1. Field of the Invention
The present invention relates to distributed sample scrambling and descrambling, and more particularly to distributed sample descrambling of a parallel distributed sample of a asynchronous transfer mode passive optical network.
2. Background of the Related Art
A Passive Optical Network (PON) is an optical subscriber net structure used for achieving economic efficiency by sharing an optical line by manually branching the line into a plurality of lines. An Asynchronous Transfer Mode (ATM) PON is a point-to-multipoint system for transmitting information of an optical line termination (OLT) of a central office to an optical network unit (ONU) of an end user using two wavelengths of 1300 nm and 1500 nm
FIG. 1 illustrates a related art PON. As shown in FIG. 1, when data transmitted through the ATM, PSTN, or ISDN is transmitted to an OLT 110, the OLT 110 transmits the data to an ONU 120 through an optical line. Transmission in the reverse direction is performed with the same procedure. The ONU 120 is connected to a terminal of a user. There are various types of ONUs. These include a ground installation type, an office installation type, a desk top type, a poll installation type, and others.
ITU-T G.983.1 is an international standard entitled Broadband Optical Access systems based on PON, and describes an interface and optical signals of a very high speed optical connection system ITU-T G.983.1 recommends that data transmitted from the OLT 110 to the ONU 120 (that is, downstream data) be scrambled. When the OLT 110 transmits data after scrambling the data using a characteristic polynomial of (X31+X28+1) the ONU 120 restores the original signal by descrambling the receiving signal again. The characteristic polynomial used in descrambling is same as that of the scrambling.
Various scrambling/descrambling methods are used. These include self synchronous scrambling (SSS), frame synchronous scrambling (FSS), distributed sample scrambling (DSS), and others.
With respect to the FSS, the scrambling/descrambling apparatuses are reset when the respective frames are started. FSS is a scrambling method which is used when the frame is large.
The SSS method is used in a physical layer of a Synchronous Digital Hierarchy (SDH) base, and has a characteristic polynomial of (X43+1). In this method, since respective states of a Pseudo random bit sequence (PRBS) generation unit depend on an input signal, the synchronous state is restored by itself even if the synchronous states of the scrambler and descrambler are seceded by a transmission error. Therefore, since the SSS method does not require the frame synchronizing process, the implementation is easy, but an input error of 1 bit is increased to output error of 2 or more bits, since the transmission error affects the state of the PRBS generation unit.
On the other hand, since a cell header is not scrambled in cell-based transmission, the DSS method is used. DSS uses a characteristic polynomial of (X31+X28+1), and transmits an ATM cell header and a user information section by scrambling them. This method requires an operation for synchronizing the PRBS generation units of the sending side and receiving side. Accordingly, the PRBS signal of the sending side is transmitted to the receiving side by operating the upper two bits of the header error check (HEC).
FIG. 2 shows the related art DSS apparatus. As shown in FIG. 2, the related DSS apparatus processes data in a clock speed of 622 MHz in a serial processing method of bit units.
The related art DSS apparatus includes a correction vector generation unit 150 for outputting a correction vector of ‘1’ when the PRBS synchronizing signals of the sending side and the receiving side are different, and a PRBS processing unit 160 for generating the PRBS signal.
The PRBS synchronizing signals are PRBS signals of the sending/receiving sides which are compared in a specific moment for descrambling downstream data.
The correction vector generation unit 150 compares the PRBS synchronizing signals of the sending side and the receiving side when the receiving data is in an acquisition state and the Start HEC (424 clock period) signal or Start HEC212 is set to a high level. When the two synchronizing signals are different, the correction vector generation unit 150 generates a correction vector K having a value of “1,” transmits the value into the PRBS processing unit 160, and corrects the PRBS signal into the correction vector K.
The PRBS processing unit 160 includes a plurality of shift registers R1˜R31 for sequentially shifting an input signal in every predetermined period. The PRBS processing unit 160 performs an exclusive-OR (XOR) operation on the output signal of the shift register R28 and output signal of the shift register R31, and applies the operation result value V to The shift register R1. Then, the PRBS processing unit 160 restores the received data into the original signal (descrambled signal) by performing the exclusive-OR operation on the output signal of the shift register R31 and the received data.
When the Start HEC signal or Start HEC212 signal is set at a high level, the correction vector generation unit 150 receives the operation result value V as the PRBS synchronizing signal of the receiving end.
The related art DSS system and method has various problems. For example, since the DSS method serially processes the receiving data at a high clock speed of 622 MHz, much power is consumed, and the timing margin is not sufficient. Also, since the timing margin is not sufficient, the operation of the descrambling apparatus is unstable.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.